The present invention relates to a lock processing system connecting a plurality of system control apparatuses, each control apparatus being connected to a plurality of processors.
For an example of a prior art lock processing system, reference may be made to the U.S. Pat. No. 4,308,580. In the system, lock data are held in a main memory unit (MMU) 3 connected to multiprocessors 1 and 2. The data are read out of the MMU 3 in response to a locking an unlocking request. The lock data are stored into the MMU 3 after a lock or unlock judgement, or merging of the lock data, so that the system made inoperative can be unlocked.
The prior art system, however, may inhibit memory accessing from another processor through competition between memories because it requires an access to the MMU 3 in response to lock or unlock judgement processing.
Further, as the memory access to the MMU 3 takes time, an additional time length is taken from the generation of a locking request until the completion of a lock judgement. The prior art system moreover has the disadvantage of being unable to make consecutive lock judgements.